Power consumption is a critical factor in the design of battery-powered compact wireless systems with volumes of 1 cm3 or less. These systems often exhibit low duty cycles, making standby mode power a key concern. Wake-up timers are one of the few components that must remain powered on during standby mode. Hence, reducing their power consumption is vital while also maintaining accuracy to ensure proper time keeping.
Crystal oscillators are the conventional choice for wake-up timers due to their excellent temperature and frequency stability. However, they typically draw 100 s of nW and require an external component, driving up system volume. Alternatively, a number of relaxation-type oscillators can be entirely integrated on-chip using different approaches. In these approaches, a current source (IREF) charges a capacitor (CINT) that is then repeatedly reset using a continuous comparator, thereby generating an output frequency as seen FIGS. 1A and 1B. Even if the charging time (CINTVINT/IREF) is perfectly temperature compensated, these methods have the key issue that the temperature-dependent comparator and buffer delays (td) impact the clock period.
A simple way to address this issue is to improve the comparator and clock buffer bandwidth so that their delays are negligible relative to the overall period. However, this leads to high power consumption. Instead, chopping can be used to reduce frequency error due to comparator offset while a feedforward period control technique can be used to remove comparator and buffer delays. While these approaches achieve high accuracy (14 to 104 ppm/° C. in the kHz range), they consume 120 nW to 4.5 μW, which is high for standby power in compact wireless sensors.
Alternatively, comparator and buffer delays can be made negligible by slowing the clock frequency to the Hz range, using very low gate leakage for IREF. While these oscillators consume sub-nW, gate leakage is highly temperature sensitive (≧375 ppm/° C.) and offers poor supply stability (≧40%/V), which is a critical drawback in battery-powered systems with often poor voltage regulation.
To avoid the fundamental trade-off between the temperature-dependent delay of the comparator and comparator power, the present disclosure introduces a novel constant charge subtraction scheme that completely eliminates comparator delay from the clock period. This section provides background information related to the present disclosure which is not necessarily prior art.